1. Field of the Invention
The present invention generally relates to semiconductor fabrication and, more particularly, to a semiconductor device having dual gate structures and formation thereof.
2. Description of Related Art
As semiconductor devices continue to scale down and the speed of the semiconductor devices increases rapidly, signal delay also increases due to high resistance and depletion of dopants in the conventional polysilicon gate electrode. Thus, signal delay reduction has become an important goal in the semiconductor industry.
Along with this trend, poly-metal gates or metal gates are being pursued to further reduce the resistance and in turn to reduce the signal delay in the semiconductor devices. In the case of metal gates, however, gate dielectrics can be contaminated if the metal layer is directly formed thereon. Therefore, the metal layer is normally formed on the doped polysilicon layer to form the gate electrode. It is generally known that if a metal such as tungsten that has a low sheet resistance is used as a gate material, an RC signal delay time is remarkably reduced.
However, there still is a need to overcome the problems of the prior art, e.g., reducing high resistance and poly depletion in the gate electrode.